Harshit Agarwal

photoWelcome to my page!!

I am Harshit Agarwal, Assistant Professor, Dept. of Electrical Engineering, IIT-Jodhpur. Previously, I was Post-Doctoral researcher/Center manager,  Berkeley Device Modeling Center (BDMC), University of California Berkeley, US. If the semiconductor world excites you, and you wish to work with me for PhD, send me an email with your CV. Institute level Post-Doc positions are also available, click here for more information.

Office: ME 303, IIT-Jodhpur

Connect with me: LinkedIn  ResearchGate  Google Scholar email: agarwalh@iitj.ac.in

Recent Updates:

  • Dr. Harshit Agarwal selected for prestigious 2020 IEEE Electron Devices Society Early Career Award 
  • BSIM-BULK107.0.0 industry-standard compact model with high-voltage modeling feature released to CMC. Paper Link.
  • Appointed Technical member of the IEEE EDS Compact Modeling Committee
  • Oct 2020: To serve as panelist in Device Characterization and Compact Modelling session under “Electronics and Semiconductors Technologies (EST)” vertical, VAIBHAV Summit.
  • Oct 2020: Delivered invited on Emerging Devices and Industry Standard Compact Modeling at STC on Industry-Academia Convergence in ECE” NIT Uttarakhand.
  • Sept 2020: Signed MoU with Micron India
  • Sept 2020: Project on Compact Modeling and Simulation of Advanced Nano-Scale Devices is approved
  • Aug 2020: Proposal for book on BSIM-BULK Model for Wireless and Mixed-Mode ICs accepted for publication by Elsevier
  • Aug 2020: Our paper on Design Optimization Techniques in Nanosheet Transistor for RF Applications to appear in IEEE TED
  • July 2020: Invited speaker at a short course on Modeling and Simulation of Nano-Transistors, IIT Kanpur.
  • March 2020: Our paper on industry-standard BSIM-IMG model accepted for publication in IEEE EDTM, Malaysia.
  • March 2020: Chairing a session on RF Device Modeling, IEEE EDTM, Malaysia 
  • Jan 2020: Delivered a talk on Compact Modeling and Recent Trends in Nanoelectronics, at MNNIT Allahabad.
  • Jan 2020: Our paper on modeling of quantum effects in nanosheet transistors  published in IEEE-TED.
  • Jan 2020: Conducted workshop on “My First Neural Network” at IIT-Jodhpur Technical Festival.
  • Dec. 2019: Delivered talk on “Current-Waveform and Statistics Aware Spin-Transfer Torque Magnetic RAM Model“, Berkeley Device Modeling Center, UC Berkeley, USA.
  • Oct. 2019: Our paper on compact modeling of High Voltage devices appeared on IEEE-TED. This model is available for circuit simulations in BSIM-BULK107.0.0beta4
  • Sept. 2019: Latest version of the Industry standard FinFET model, BSIM-CMG111.0.0 released.

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